A practical orthogonal memory processor for the 2D wavelet transform

Robert Lang
Department of Electrical and Computer Engineering, The University of Newcastle, Callaghan 2308, Australia.
rlang@ascod.newcastle.edu.au

Andrew Spray
Department of Electrical and Computer Engineering, The University of Newcastle, Callaghan 2308, Australia.
aspray@faceng.newcastle.edu.au

Abstract

In this paper we show how the Orthogonal Memory Processor (OMP) is suited to the implementation of the two-dimensional wavelet transform (2DWT) due to its ability to transpose a data-set in negligible time.

The OMP architecture is a shared memory machine in which the processing elements can alternately (together) access either rows or columns of the two-dimensional data-set. Since the 2DWT involves alternate accesses of row and column data, it is an application well-suited to this machine.

As a further contribution, this paper extends the work of the general OMP architecture to include consideration of a ``hybrid'' configuration with $n$ processors and a $m \times m$ memory network for some practical value of $m < n$. Pipelined memory accesses allow an architecture with an optimal processor count compared to the problem size and a more practical memory structure.

Tradeoffs are presented in terms of number of processors and memory unit size to determine how complex (in terms of area) the architecture needs to be to produce a desired performance (in terms of time).

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